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now parsing memory statements

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This commit is contained in:
Yehowshua Immanuel 2024-12-06 14:57:32 -05:00
parent cbbc7e73bd
commit 38fb13556f
6 changed files with 103 additions and 24 deletions
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42
src/RTLILParser/AST.hs
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@ -1,9 +1,12 @@
module RTLILParser.AST(
AutoIdxStmt(..), ParamStmt(..), AutogenId(..),
Constant(..), CellStmt(..), PublicId(..),
AttrStmt(..), Value(..), Id(..),
CellId(..), CellType(..), WireId(..),
SigSpec(..), Slice(..)
AutoIdxStmt(..) ,ParamStmt(..) ,AutogenId(..)
,Constant(..) ,CellStmt(..) ,PublicId(..)
,AttrStmt(..) ,Value(..) ,Id(..)
,CellId(..) ,CellType(..) ,WireId(..)
,SigSpec(..) ,Slice(..) ,ConnStmt(..)
,WireOption(..) ,WireStmt(..) ,Wire(..)
,MemoryOption(..) ,MemoryStmt(..) ,Memory(..)
,MemoryID(..)
) where
import Text.Read (Lexeme(Ident))
import Data.Functor.Contravariant (Contravariant)
@ -15,13 +18,30 @@ data Slice = Slice Int (Maybe Int) deriving (Show)
data Id = Public PublicId
| Autogen AutogenId
deriving (Show)
data WireId = WireId Id
deriving (Show)
data WireId = WireId Id deriving (Show)
data MemoryID = MemoryID Id deriving (Show)
data AutoIdxStmt = AutoIdxStmt Int deriving (Show)
data AttrStmt = AttrStmt Id Constant deriving (Show)
data CellStmt = CellStmt CellId CellType deriving (Show)
data CellId = CellId Id deriving (Show)
data CellType = CellType Id deriving (Show)
data AttrStmt = AttrStmt Id Constant deriving (Show)
data CellStmt = CellStmt CellId CellType deriving (Show)
data CellId = CellId Id deriving (Show)
data CellType = CellType Id deriving (Show)
data ConnStmt = ConnStmt SigSpec SigSpec deriving (Show)
data WireOption = WireOptionWidth Int
| WireOptionOffset Int
| WireOptionInput Int
| WireOptionOutput Int
| WireOptionInout Int
| WireOptionUpto
| WireOptionSigned
deriving (Show)
data WireStmt = WireStmt WireId [WireOption] deriving (Show)
data Wire = Wire WireStmt [AttrStmt] deriving (Show)
data MemoryOption = MemoryOptionWidth Int
| MemoryOptionSize Int
| MemoryOptionOffset Int
deriving (Show)
data MemoryStmt = MemoryStmt MemoryID [MemoryOption] deriving (Show)
data Memory = Memory MemoryStmt [AttrStmt] deriving (Show)
data SigSpec = SigSpecConstant Constant
| SigSpecWireId WireId
| SigSpecSlice SigSpec Slice