actively re-orging by section
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4 changed files with 147 additions and 78 deletions
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@ -12,20 +12,59 @@ import Text.Read (Lexeme(Ident))
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import Data.Functor.Contravariant (Contravariant)
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import GHC.RTS.Flags (DoCostCentres(CostCentresAll))
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data PublicId = PublicId String deriving (Show)
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data AutogenId = AutogenId String deriving (Show)
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data Slice = Slice Int (Maybe Int) deriving (Show)
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-- taken from: https://yosyshq.readthedocs.io/projects/yosys/en/0.47/appendix/rtlil_text.html
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-- types below organized accordingly
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-- identifiers
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data Id = Public PublicId
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| Autogen AutogenId
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deriving (Show)
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data WireId = WireId Id deriving (Show)
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data MemoryID = MemoryID Id deriving (Show)
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data PublicId = PublicId String deriving (Show)
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data AutogenId = AutogenId String deriving (Show)
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-- values
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data Value = Value
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{ width :: Int
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, value :: Int
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}
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deriving (Show)
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-- strings
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-- comments
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-- file
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-- Autoindex statements
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data AutoIdxStmt = AutoIdxStmt Int deriving (Show)
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-- Module
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data ParamStmt = ParamStmt
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{ paramId :: Id
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, paramConstant :: Maybe Constant
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}
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deriving (Show)
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data Constant = ConstantValue Value
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| ConstantInteger Int
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| ConstantString String
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deriving (Show)
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-- Attribute statements
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data AttrStmt = AttrStmt Id Constant deriving (Show)
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data CellStmt = CellStmt CellId CellType deriving (Show)
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data CellId = CellId Id deriving (Show)
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data CellType = CellType Id deriving (Show)
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-- Signal Specifications
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data SigSpec = SigSpecConstant Constant
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| SigSpecWireId WireId
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| SigSpecSlice SigSpec Slice
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| SigSpecConcat [SigSpec]
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deriving (Show)
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data Slice = Slice Int (Maybe Int) deriving (Show)
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-- Connections
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data ConnStmt = ConnStmt SigSpec SigSpec deriving (Show)
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-- Wires
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data Wire = Wire WireStmt [AttrStmt] deriving (Show)
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data WireStmt = WireStmt WireId [WireOption] deriving (Show)
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data WireId = WireId Id deriving (Show)
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data WireOption = WireOptionWidth Int
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| WireOptionOffset Int
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| WireOptionInput Int
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@ -34,30 +73,21 @@ data WireOption = WireOptionWidth Int
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| WireOptionUpto
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| WireOptionSigned
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deriving (Show)
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data WireStmt = WireStmt WireId [WireOption] deriving (Show)
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data Wire = Wire WireStmt [AttrStmt] deriving (Show)
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-- Memories
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data Memory = Memory MemoryStmt [AttrStmt] deriving (Show)
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data MemoryID = MemoryID Id deriving (Show)
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data MemoryStmt = MemoryStmt MemoryID [MemoryOption] deriving (Show)
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data MemoryOption = MemoryOptionWidth Int
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| MemoryOptionSize Int
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| MemoryOptionOffset Int
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deriving (Show)
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data MemoryStmt = MemoryStmt MemoryID [MemoryOption] deriving (Show)
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data Memory = Memory MemoryStmt [AttrStmt] deriving (Show)
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data SigSpec = SigSpecConstant Constant
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| SigSpecWireId WireId
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| SigSpecSlice SigSpec Slice
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| SigSpecConcat [SigSpec]
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deriving (Show)
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data Value = Value
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{ width :: Int
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, value :: Int
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}
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deriving (Show)
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data Constant = ConstantValue Value
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| ConstantInteger Int
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| ConstantString String
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deriving (Show)
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data ParamStmt = ParamStmt
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{ paramId :: Id
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, paramConstant :: Maybe Constant
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}
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deriving (Show)
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-- Cells
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data CellStmt = CellStmt CellId CellType deriving (Show)
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data CellId = CellId Id deriving (Show)
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data CellType = CellType Id deriving (Show)
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-- Processes
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-- Switches
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-- Syncs
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