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Yehowshua Immanuel 2023-09-25 03:34:21 -04:00
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@ -35,4 +35,7 @@ TOPMODULE=mkTop make v_compile
```
# TODO
- [ ] debug UART accuracy
- [ ] debug UART accuracy
# Notable Reference Files
``/Users/yehowshuaimmanuel/git/bsc/testsuite/bsc.bsv_examples/cpu/FiveStageCPUQ3sol.bsv``