wow - loopback in sim actually worksgit status
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10 changed files with 96 additions and 261 deletions
52
src/Top.bsv
52
src/Top.bsv
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@ -5,6 +5,15 @@ export ITop(..);
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// export mkSim;
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import "BDPI" function Action init_terminal();
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import "BDPI" function Action restore_terminal();
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import "BDPI" function Bit#(8) get_char_from_terminal();
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import "BDPI" function Int#(32) is_char_available();
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import "BDPI" function Action write_char_to_terminal(Bit#(8) chr);
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import "BDPI" function Action setup_sigint_handler();
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import "BDPI" function Bool was_ctrl_c_received();
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import Deserializer::*;
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import Core::*;
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import Serializer::*;
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@ -29,46 +38,59 @@ module mkTop(ITop);
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ISerializer # (FCLK, BAUD) serializer <- mkSerialize(fileHandle);
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Core # (FCLK) core <- mkCore();
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Reg#(Bit#(8)) ledReg <- mkReg(0);
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Reg#(Bit#(8)) persist_led <- mkReg(0);
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messageM("Hallo!!" + realToString(5));
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rule attach_core_outputs;
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ledReg <= core.get_led;
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// connect up core device
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rule core_led_o;
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persist_led <= core.get_led;
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endrule
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rule core_char_device_o;
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serializer.putBit8(core.get_char);
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endrule
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rule attach_core_inputs;
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rule core_char_device_i;
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core.put_char(deserializer.get);
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endrule
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// output methods
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method Bit#(1) ftdi_rxd;
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return serializer.bitLineOut;
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endmethod
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method Bit#(8) led;
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return ledReg;
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endmethod
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method Action ftdi_txd(Bit#(1) bitIn);
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deserializer.putBitIn(bitIn);
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endmethod
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method Bit#(8) led;
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return persist_led;
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endmethod
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endmodule
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module mkSim(Empty);
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BRAM_Configure cfg = defaultValue;
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// Define a 3-bit register named count
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Reg#(UInt#(3)) count <- mkReg(0);
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Reg#(UInt#(3)) count <- mkReg(0);
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Reg#(Bool) init_C_functions <- mkReg(False);
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Core#(FCLK) core <- mkCore();
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// Rule to update and display the count
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rule tick (True);
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count <= unpack({1'b1, (pack(count))[2:1]});
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($display)(count);
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rule init_c_functions_once (!init_C_functions);
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init_terminal();
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setup_sigint_handler();
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init_C_functions <= True;
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endrule
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rule core_char_device_o;
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write_char_to_terminal(core.get_char);
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endrule
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rule core_char_device_i(is_char_available() == 1);
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core.put_char(get_char_from_terminal());
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endrule
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// Rule to finish the simulation when count reaches 6
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rule end_sim (count == 6);
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rule end_sim (was_ctrl_c_received());
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restore_terminal();
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$display("GOT CTRL+C");
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($finish)();
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endrule
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endmodule
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