add support for mismatching bitdwidths

This commit is contained in:
Yehowshua Immanuel 2022-07-30 19:58:54 -04:00
parent eb379e4ce6
commit 0052baf196
5 changed files with 245 additions and 228 deletions

View file

@ -30,6 +30,7 @@ pub const files : [&str; 30] = [
"./test-vcd-files/vivado/iladata.vcd",
"./test-vcd-files/xilinx_isim/test.vcd",
"./test-vcd-files/xilinx_isim/test1.vcd",
// TODO : add signal ignore list to handle bitwidth mismatches
"./test-vcd-files/xilinx_isim/test2x2_regex22_string1.vcd"
];