state machine seems to be working

This commit is contained in:
Yehowshua Immanuel 2022-05-22 23:00:03 -04:00
parent 594f603cbb
commit 2a2eb8669b
2 changed files with 98 additions and 67 deletions

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@ -26,17 +26,13 @@ The first build of the program may take some time.
# TODO
- [x] We need a way to merge lines.
- [ ] Need to perform signal aliasing
- use vec of enum {Sig, Alias}
- [ ] Include line and possible column numbers
- [ ] Should insert nodes in BFS order
- [ ] Change states to lowercase
- [ ] We need to start regression testing the parser over all files
- [ ] Take a look at GTKWave parser to compare effificiency.
- [ ] Send survey to community channel.
### May 18
- [ ] move while loop into word yielding iterator
# Files
- ./test-vcd-files/aldec/SPI_Write.vcd
- ./test-vcd-files/ghdl/alu.vcd