some docs and create lib

2022-09-08 15:02:41 -04:00 · 2022-09-08 15:02:41 -04:00 · 4c1af97760
commit 4c1af97760
parent 5700db83a0
4 changed files with 54 additions and 23 deletions
--- a/README.md
+++ b/README.md
@ -75,7 +75,6 @@ Here's a command to test on a malformed VCD:
       - [ ] may need to refactor with allow for get_mut for dynamic
             compression-decompression for multiple signal structs 
             at once to allow for multi-threading
- - [x] add string support for timeline value scanner
 - [ ] test against large waveforms from the
       [verilog-vcd-parser](https://github.com/ben-marshall/verilog-vcd-parser)
       tool