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clean up warnings a bit

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Yehowshua Immanuel 2025-03-04 23:54:30 -05:00
parent 30650b870c
commit 67b44dedc0
8 changed files with 12 additions and 32 deletions
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3
hs/Cpu.hs
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@ -7,9 +7,8 @@ module Cpu(
riscvCPUInit) where
import Clash.Prelude
import Types(Pc, Mem)
import Types(Pc)
import RegFiles(GPR, FPR, CSR, gprInit, fprInit, csrInit)
import Peripherals.Ram(Ram)
data Endian = Big | Little
deriving (Generic, Show, Eq, NFDataX)