initial support for exceptions

hs/Fetch.hs

@@ -14,6 +14,11 @@ import Clash.Prelude
 import Types(Mem, Addr, Insn)
 import Util(endianSwapWord)
 import Bus(ReadResponse, WriteResponse, read)
+import Bus(Peripherals(..))
+import BusTypes(ReadRequest(..), TransactionSize(..))
+
+import GHC.IO (IO)
+import GHC.Base (Applicative(pure))
 
 data FetchResult  = Instruction Insn
                   | Misaligned Addr
@@ -30,3 +35,7 @@ fetchInstruction mem addr =
     case isWordAligned of
       True -> Instruction insn
       False -> Misaligned addr
+
+fetchInstruction1 :: Peripherals -> Addr -> IO ReadResponse
+fetchInstruction1 peripherals addr =
+  read (BusTypes.Request addr BusTypes.SizeFullWord) peripherals