initial support for exceptions

hs/Simulation.hs

@@ -3,7 +3,13 @@
 {-# LANGUAGE TypeOperators #-}
 {-# LANGUAGE ConstraintKinds #-}
 
-module Simulation(Args(..), simulation, Simulation(..)) where
+module Simulation(
+  Args(..),
+  simulation,
+  RISCVCPU(..),
+  Machine(..),
+  Simulation(..)
+  ) where
 
 import qualified Prelude as P
 import Peripherals.Setup(setupPeripherals, InitializedPeripherals(..))
@@ -12,7 +18,6 @@ import Clash.Prelude
 import Bus(Peripherals(..))
 import Cpu(
   RISCVCPU(..),
-  RISCVCPU (RISCVCPU),
   riscvCPUInit)
 import Fetch(fetchInstruction, FetchResult (Instruction, Misaligned))
 import Isa.Decode(decode)